1. Field of the Invention
This invention relates to an interface circuit for a single-chip microprocessor which can be utilized in either a first configuration employing internal memory of the singlechip microprocessor or a second configuration employing memory external to the single-chip microprocessor.
2. Description of the Prior Art
Prior art circuits for single-chip microprocessors are shown in FIGS. 1 and 2.
The first circuit configuration shown in FIG. 1 includes a single-chip microprocessor 1, such as model no. 8396 from Intel, having internal RAM, internal ROM with computer programs stored therein, internal timer circuitry, internal I/O ports, and other internal elements so that external elements of the same type are not necessary. Due to the elimination for the requirement of external elements, each of the ports P.sub.0 to P.sub.2 of the this microprocessor can be utilized as input or output ports, and the most efficient configuration can be obtained for utilization of space for the microprocessor system.
The circuit configuration shown in FIG. 2 employs memory elements which are external to the single-chip microprocessor 1. Data latch units 6 and 7 have data inputs connected to respective first and second address-data (A-D) ports of the microprocessor 1, and have trigger inputs T connected to the ALE (Address Latch Enable) output of the microprocessor 1. External memory elements, such as ROMs 8 and 9 having programs stored therein, have address inputs A connected to outputs of the latch units 6 and 7, have chip select inputs CS connected to outputs of the latch unit 6, have data outputs D connected to the A-D ports of the microprocessor 1, and have operate enable (OE) inputs connected to the read (RD) output of the microprocessor 1. Input-output unit (I/O) 10 has address inputs A connected to the outputs of latches 6 and 7, has chip select input CS connected to the outputs of the latch unit 6, has data port D connected to the second A-D port of the microprocessor 1, has input RD connected to the output RD of microprocessor 1, has write input WR connected to the output WR of the microprocessor 1, and has input and output ports P.sub.1 ' and P.sub.2 '.
In the single-chip microprocessor system of FIG. 2, address signals and data signals are multiplexed on the A-D ports, i.e. address signals and data signals are alternately applied to the bus connected to the A-D ports in order to improve efficiency in the utilization of the pins of the single-chip microprocessor 1. In this operation, the address signal outputted from the processor is stored in the latch units 6 and 7 by the ALE signal from the microprocessor 1, the stored address signals designate an address in the ROMs 8 and 9 or I/O unit 10, and then during the next cycle period of the microprocessor 1 a program instruction or data is inputted from ROMs 8 and 9 or inputted from or outputted to I/O unit 10.
The conventional microcomputer systems of the types illustrated by FIGS. 1 and 2 have several disadvantages. In the case of FIG. 1 wherein the single-chip microprocessor employs an internal mask ROM, modification of the program in the internal ROM is not possible. Although the ROM in the case of FIG. 2 can be changed to change the program, the interface circuitry of FIG. 2 cannot be used in a configuration where internal memory is used instead of external memory; the circuit then requires the use of the external elements for I/O functions, and each of the ports of the processor is used only for an address or for the input and output of data.